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thrice
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Re: Leica Triple Resolution marketing vs reality. Another look.


zhangyue wrote:
If you tell me that CMOS sensor means every single pixel has its own dedicate ADC build in, and output is in digital domain. OK, I will buy this argument.


This is the fundamental difference between CMOS sensors and CCD sensors. This is the only point I have been trying to make. Not necessarily each pixel but certainly each column on modern sensors.
Edit: probably more importantly, per pixel amplifiers, rather than column amps on CCD.

zhangyue wrote:
I'd like to understand which part make you think it is impossible to do binning at hardware level for CMOS?


On a CCD sensor the analogue charge is summed for adjacent pixels then sent to the amplifier and ADC, that is what is considered hardware binning as all 4 pixels (on monochrome sensor in the most simplistic example) behave physically like one. Binning occurs in the charge domain.

On a CMOS sensor the pixel has its own amplifier and on modern BSI sensors each column its own ADC. It is possible to have a CMOS sensor without the ADC per-column but that leads to issues like amp glow (generic term caused by heat generating components on the periphery of the sensor) and additional noise. If you move the amplifier to no longer be at a pixel level then congratulations you've just made a CCD.

If the sensor does not have per-column ADC you can bin in the voltage domain but that is not considered hardware binning and includes read noise.
Sony Exmor R sensors like the IMX455 have CDS (correlated double sampler - reads twice and averages read noise) at the charge level to reduce analogue noise at a column level which also makes any kind of hardware binning impossible.
They also have per-column ADC and a second digital domain CDS to further reduce noise. For these reasons any Exmor or Exmor R or Exmor RS based sensor cannot do voltage domain binning.

The design is so intrinsically locked to column (and in future per pixel) level ADC I doubt any kind of hardware binning is in our future for a CMOS sensor that performs with any kind of competitive noise level.

zhangyue wrote:
I don't want to be rude but just want to match the tone of your reply here. I have a feeling you don't have knowledge depth here. If you want technical discuss, Id happy to do so.


Don't feel rude, I welcome the response and look forward to more.



Apr 26, 2024 at 04:35 PM
thrice
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Upload & Sell: Off
Re: Leica Triple Resolution marketing vs reality. Another look.


zhangyue wrote:
If you tell me that CMOS sensor means every single pixel has its own dedicate ADC build in, and output is in digital domain. OK, I will buy this argument.


This is the fundamental difference between CMOS sensors and CCD sensors. This is the only point I have been trying to make. Not necessarily each pixel but certainly each column on modern sensors.

zhangyue wrote:
I'd like to understand which part make you think it is impossible to do binning at hardware level for CMOS?


On a CCD sensor the analogue charge is summed for adjacent pixels then sent to the amplifier and ADC, that is what is considered hardware binning as all 4 pixels (on monochrome sensor in the most simplistic example) behave physically like one. Binning occurs in the charge domain.

On a CMOS sensor the pixel has its own amplifier and on modern BSI sensors each column its own ADC. It is possible to have a CMOS sensor without the ADC per-column but that leads to issues like amp glow (generic term caused by heat generating components on the periphery of the sensor) and additional noise. If you move the amplifier to no longer be at a pixel level then congratulations you've just made a CCD.

If the sensor does not have per-column ADC you can bin in the voltage domain but that is not considered hardware binning and includes read noise.
Sony Exmor R sensors like the IMX455 have CDS (correlated double sampler - reads twice and averages read noise) at the charge level to reduce analogue noise at a column level which also makes any kind of hardware binning impossible.
They also have per-column ADC and a second digital domain CDS to further reduce noise. For these reasons any Exmor or Exmor R or Exmor RS based sensor cannot do voltage domain binning.

The design is so intrinsically locked to column (and in future per pixel) level ADC I doubt any kind of hardware binning is in our future for a CMOS sensor that performs with any kind of competitive noise level.

zhangyue wrote:
I don't want to be rude but just want to match the tone of your reply here. I have a feeling you don't have knowledge depth here. If you want technical discuss, Id happy to do so.


Don't feel rude, I welcome the response and look forward to more.



Apr 26, 2024 at 04:46 AM





  Previous versions of thrice's message #16532585 « Leica Triple Resolution marketing vs reality. Another look. »

 




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