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 p.1 #5 · Question about Wafers with Full Frame Sensors | |
There are many many many things that can affect the die on a wafer during the build process.
Creating die ( sensors or CPU's ) is just like creating an old photo. You take a bare
silicon wafer and you coat it with different chemicals/metals layer by layer until you build
up the electrical stackup that creates the components.
So there are hundreds of steps required during the stacking of the layers. Each layer
of chemical or metal deposition has its own inherent potential problems that can affect
the performance and affect the yield.
For sensor die one major killer is a defect called "PC" ( partical count ) and is nothing more than contamination in the form of small particles.... and even here there are hundreds of sources that contribute to un desired PC counts... some are stainless steel ( from wafer handlers ) some are caused from miss-process ( peeling tungsten, silane powder, mis-struck plasma, dirty deposition chamber, scratched wafers, broken wafers ) the list goes on and on for each and every step in the wafer build cycle. The idea is to
track down the source of PC contamination and fix it. This is one area that has great potential to get the yield up.
Those examples are only the PC defects... there's much more than that even, some are over etch, under etch, pealing photo resist, shifted photo pelical, too much implant,
too thick metal dep, too thin metal dep, too thin oxide, too thin SOG...
I would be very suprised that Canon would have yeild down at 25% , in our fabs we get that kind of yield during the startup of a device and the yeild numbers just climb from there... most if not all fab's run around ~90 + % after all of the processes have been tweeked.
Just lets say that there would be alot of process engineers fired at our fab's if they couldn't do better than 25% 
I don't know for sure but I would also expect to see Canon producing some of the sensors in 300mm Fabs now and that will bring up the number of sensors to the market.
The trend for the last few years has been to " foundery " components where larger numbers of devices are required. The way this works is a Semi-conductor company designs the devices, works out the design/process issues in its own fab ( close to the designers ) and then sends the recipes and in some cases the equipment to a seperate
company that only has fab's and doesn't design ( Asia Fabs ) and the " Foundery Fab "
actually creates the products. Its much cheaper that way. And of course the yields have to be very good or there are other foundery fabs that compete at that level.
Sensor manufacturing versus CPU manufacturing are very different.... when a sensor is
bad, its just bad... no one wants a sensor with lots of dead pixels.
With CPU's... if some of the on-board memory is determined compromised then it can be mapped out, just like standard memory chips.. same thing.
There are several things that can affect the CPU's speed ratings... the races may have ended up too thick, too thin, resistance of components not at optimal...lots of other issues can have effect also... but the CPU is speed tested and of course they are bin'd
accordingly and sold at their respective performance level.... but like all semi-conductors, once the processes have settled in and all the pokes and tweeks completed the performance variances dwindle to nothing.
Also, As far as I know at this time... the largest CPU as in silicone real-estate is the
SUN Ultra Sparc... Its as large if not larger than any of the camera sensors.
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